Senior Hardware Design Verification Engineer

2 weeks ago

مصر, Egypt Siemens Full time

Siemens Digital Industries Software is a global technology powerhouse. With some of the best-known brands in the world, Siemens has stood for engineering excellence, innovation, quality, and reliability for more than 175 years.

We're looking for a **Senior Hardware Design Verification Engineer **to join our **HAV Storage Solutions **team in Cairo, Egypt.

**Main Responsibilities**:

- Study and review standard specifications.
- Develop and put testing environment architecture.
- Identify design features for verification and functional coverage.
- Develop verification/test plans and functional coverage plans.
- Create verification reference models and constrained random stimulus generators.
- Develop and maintain System Verilog/UVM testbenches.
- Drive Functional Coverage and Code coverage to closure.
- Maintain efficient and clean regression status.
- Work closely with RTL designers.

**Required skills, knowledge and experience**:

- Bachelor’s degree in Computer Engineering, Electronics Engineering or a related technical field.
- Solid knowledge about Digital/RTL Design Basics.
- Strong knowledge of OOP concepts.
- 3-5 years experience in Verilog, System Verilog and Universal Verification Methodology (UVM).
- Knowledge of scripting language (Shell/Perl/TCL/Python) is a plus
- Good programming skills in C or C++ is a huge plus.
- Preferably has knowledge in Storage protocols like UFS, SAS, or similar.
- Prior knowledge in FPGA prototyping or emulation is preferred.
- Highly developed communication skills, including the ability to present ideas and share your knowledge with others.

We offer a comprehensive reward package which includes a competitive basic salary and a generous holiday allowance.

Siemens is an equal opportunities employer and do not discriminate unlawfully on any grounds. We are committed to providing access, equal opportunity for individuals with disabilities in employment, its services, programs, and activities.

**#DISW**:
**#LI-PLM**:
**#LI-Hybrid**:

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