Senior Digital Verification/cad Engineer

1 week ago

مصر, Egypt Vidatronic, Inc. Full time

**About the Job**: -Extract verification requirements from Design Specifications and Write verification plans. -Perform Functional verification for medium size digital circuits using advanced verification methodologies. -Design self-checking testbenches using modern verification techniques. -Implement functional coverage and assertions using System Verilog. -Responsible for analyzing and debugging simulation failures in RTL and Gates level as well as analyzing functional coverage results. -Perform behavioral modeling of analog and mixed-signal circuits. -Set-up Process Design Kits. -Handle problems in the design workspace. -Deal with version control systems and work on developing and maintaining the projects' work areas.

**Job Requirements**: - Bachelor's degree in Electronics and Electrical Communications or Computer Engineering. - 3+ years of experience with any of the advanced verification methodologies UVM/OVM/VMM. - A solid understanding of object-oriented concepts and experience with building verification environments. - Fluency with Verilog and SystemVerilog. - Experience with system verilog assertions and Coverage driven verification. - Strong debugging skills. - Experience with low-power verification (UPF/CPF). - Strong knowledge of a scripting language (Shell/PERL/Python). - Experience with Cadence Xcelium and/or Synopsys VCS. - Experience with formal verification is a plus.

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