Digital Verification Engineer

2 weeks ago


القاهرة, Egypt Efabless Full time

**Job Title: Digital Verification Engineer**

**Location**: Cairo/Hybrid

**About Efabless**:
Efabless is the world’s first platform for community-driven chip design and manufacturing. We empower engineers to design and produce custom chips at zero upfront cost, using our open-source design environment and a global network of manufacturing partners. Our mission is to democratize access to custom silicon and accelerate innovation in the electronics industry.
**About ChipIgnite**:
ChipIgnite is Efabless’ innovative program designed to lower the barrier of entry for creating custom silicon. It provides a streamlined path for turning ideas into physical silicon, offering free chip design, manufacturing, and packaging for select projects.

**Job Summary**:
**Responsibilities**:

- Develop and execute detailed verification plans for SoC designs using SystemVerilog and UVM.
- Design, maintain, and optimize UVM-based testbenches and verification environments for complex SoC features.
- Collaborate closely with design and architecture teams to ensure verification requirements are met and performance goals achieved.
- Conduct UPF and DFT verification to support low-power design requirements and ensure testability.
- Leverage open-source tools and frameworks to improve verification workflows and enhance productivity.
- Debug and analyze root causes of test failures, and work with cross-functional teams to resolve issues.
- Provide documentation for verification processes, results, and methodologies.
- Collaborate with firmware development teams to ensure seamless integration and verification of hardware-software interactions.

**Requirements**:

- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
- Minimum of five years of experience in digital verification, with a focus on SoC verification.
- Strong proficiency in SystemVerilog and UVM, with demonstrated experience in building and maintaining UVM testbenches.
- In-depth knowledge of SoC architectures, digital design, and simulation methodologies.
- Familiarity with UPF (Unified Power Format) and DFT (Design for Test) verification methodologies.
- Experience with open-source verification tools and version control systems (e.g., GitHub, GitLab).
- Excellent analytical skills and the ability to collaborate effectively with cross-functional teams.

**Preferred Qualifications**:

- Experience in firmware development, ideally with knowledge of hardware-software co-verification.
- Familiarity with hardware verification platforms, emulation, or FPGA prototyping.
- Knowledge of CI/CD processes and automation in verification workflows.
- Familiarity with assertion-based verification and functional coverage techniques.
- Background in secure design verification or low-power verification techniques.
- Experience with UPF and DFT for power optimization and design testability.



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