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Senior Digital Design Engineer
1 week ago
Siemens Digital Industries Software is a global technology powerhouse. With some of the best-known brands in the world, Siemens has stood for engineering excellence, innovation, quality, and reliability for more than 175 years.
We’re looking for a **Senior Digital Design Engineer** to join **Consulting** **team** in Cairo, Egypt.
As a member in Consulting team you will be part of a worldwide team of industry experts working with Siemens DISW customers on state of the art technologies and on a wide range of products and domains; Telecommunication, Automotive, Machine Learning, and others. You will be working closely with customers and sales force to identify business needs, architect, and implement optimal solutions using Siemens DISW tools and methodologies. As a Senior member of the team, you will also be responsible for defining the solutions we provide, promoting our capabilities, and guiding junior team members.
**Required skills, knowledge and experience**:
- Bachelor’s degree in Computer Engineering, Electronics Engineering or a related technical field.
- +10 years of experience in chip design, specializing in SOC integration.
- Excellent analytical and problem-solving skills.
- Experience in RTL design (Verilog), System-On-Chip design/integration flow, and design automation.
- ARM IP experience is a plus
- Knowledge of scripting using Shell, Perl, and/or Python.
- Ability to travel abroad for short/long terms.
- Preferably has a recent senior level role/responsibility.
- Highly developed communication skills, including the ability to present ideas and share your knowledge with others.
We offer a comprehensive reward package which includes a competitive basic salary and a generous holiday allowance.
Siemens is an equal opportunities employer and do not discriminate unlawfully on any grounds. We are committed to providing access, equal opportunity for individuals with disabilities in employment, its services, programs, and activities.
**#DISW**:
**#LI-PLM**:
**#LI-Hybrid**:
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